The present invention relates to a semiconductor device. More particularly, the present invention relates to a semiconductor device having a silicon-on-insulator (SOI) structure and a method for fabricating the same.
Currently, new efforts have been made to overcome the limits of a memory cell structure containing storage capacitors, which takes up a large area of the memory device. For example, a floating body cell (FBC) structure, which eliminates the capacitor. The FBC structure utilizes a floating body effect phenomenon where a threshold voltage is changed when charges are accumulated in a channel bottom of the transistor.
Generally, in a conventional DRAM utilizing a cell transistor and storage capacitor, a complicated process is required to obtain the DRAM. In addition, a high thermal treatment process is performed to improve a characteristic of the transistor. However, the FBC technology does not require the complicated process. Also, the FBC technology facilitates a manufacture of an embedded DRAM including a LOGIC circuit without a capacitor. As a result, various applications are formed with the FBC technology.
However, because the FBC technology requires using a substrate having a floating body, it uses a SOI substrate unlike a conventional DRAM. Based on a 300 mm wafer, the SOI substrate is more expansive than a bulk silicon substrate by three or more times. As a result, the SOI substrate causes an increase in the manufacturing cost of DRAMs.
When the SOI substrate is used in the manufacture of DRAMs, a peripheral circuit has to be formed over the SOI substrate. However, a model parameter of the transistor used in the peripheral circuit can not be used directly in a DRAM technology using the bulk silicon substrate. As a result, the peripheral circuit has been developed under a new SOI circumstance, which results in an increase of a developing period.